Implementation of a Wide Band and Low Noise Signal Generator Based on Phase Locked Loop

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dc.contributor.authorMutinda, M. B
dc.contributor.authorMunji, K. M
dc.contributor.authorNyenge, L. R
dc.date.accessioned2023-07-19T08:31:59Z
dc.date.available2023-07-19T08:31:59Z
dc.date.issued2023
dc.descriptionArticleen_US
dc.description.abstractA signal generator, an essential electronic test instrument with versatile applications, finds its utility in various fields such as cellular communications, radar systems, microstrip antennas, and electronics labs. This research focuses on the simulation and design of a low-phase noise signal generator operating in frequency range of 35 MHz to 3 GHz . To accomplish this, an Atmega 328P microcontroller on an Arduino board was employed to control the synthesizer based on the Phase-Locked-Loop (PLL) concept. The signal generator’s performance was assessed, with particular emphasis on predicting and analyzing the phase noise generated by the PLL components. To ensure a robust system, a third-order loop filter was devised to effectively suppress spurs. Through simulation using the ADIsimPLL simulation tool, optimal values for loop bandwidth (10 kHz) and phase margin (45°) were obtained. The chosen Phase-Locked-Loop chip for this implementation was the ADF4351, manufactured by Analog Devices. By conducting transient analysis, the time required for the PLL system to transition from the minimum to the maximum output frequency was determined. Furthermore, the characteristics of the generator’s signal were investigated in the frequency range of 35-100 MHz using a cathode ray oscilloscope, and for 101-3000 MHz using a spectrum analyzer. The phase noise levels were calculated at different frequencies (35 MHz, 387 MHz, 1 GHz, 2 GHz, and 2.9 GHz) and analyzed at varying offsets (1 kHz, 10 kHz, 100 kHz, and 1 MHz). Comparatively, the experimental results indicated a higher level of phase noise than what was obtained through simulation. Notably, as the output frequency increased, there was a corresponding increase in the amount of phase noise. The maximum spur observed occurred at the third harmonic, measuring -18.6 dBc, while the minimum spur appeared at the fourth harmonic, measuring -44.5 dBc.en_US
dc.identifier.citationMutinda, M. B., Munji, K. M., & Nyenge, L. R. (2023). Implementation of a Wide Band and Low Noise Signal Generator Based on Phase Locked Loop. African Journal of Pure and Applied Sciences, 4(1), 50-59.en_US
dc.identifier.otherDOI 10.33886/ajpas.v4i1.371
dc.identifier.urihttp://ir-library.ku.ac.ke/handle/123456789/26310
dc.language.isoenen_US
dc.publisherKenyatta Universityen_US
dc.subjectFrequency synthesizeren_US
dc.subjectADF4351en_US
dc.subjectLoop filteren_US
dc.subjectPhase-Locked-Loopen_US
dc.subjectVoltage-controlled oscillatoren_US
dc.titleImplementation of a Wide Band and Low Noise Signal Generator Based on Phase Locked Loopen_US
dc.typeArticleen_US
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