Design and implementation of high frequency signal generator based on phase locked loop
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Date
2023-11
Authors
Musyoka, Mutinda Boniface
Journal Title
Journal ISSN
Volume Title
Publisher
Kenyatta university
Abstract
A signal generator is an electronic test instrument that has a wide range of applications. Some of these applications include testing systems in cellular communications, radar, microstrip antennas and testing components in electronics labs. For a signal generator to be used in these applications, it should generate high frequencies, have a low level of phase noise, and also have a fast locking time. The purpose of this research was to designandbuildasignalgeneratorthatoperatesontheprincipleofaphase-lockedloop, has the capacity to generate frequencies ranging from 35 MHz to 3 GHz, and has a low degree of phase noise. The simulation of the phase-locked loop synthesizer was done using the ADIsimPLL design tool. The phase locked loop chip used in simulation was the ADF4351 from Analog Devices. In the design, we implemented a loop filter of the third order and chose a reference frequency of 10 MHz. The layout of the phase locked loop was simulated, and the results showed that the optimal values for loop bandwidth and phase margin were 10 kHz and 45°, respectively. Following the simulation, the optimal values for each of the loop filter’s components were analyzed and calculated. The signal generator was built by integrating the phase locked loop synthesizer and a keypad shield with an Arduino UNO microcontroller. The ADF4351 was programmed via Serial Peripheral Interface (SPI) to enable the changing of frequencies using the keypad shield. The nature of the generator’s signal was investigated using a cathode ray oscilloscope in the 35-100 MHz frequency range. The testing was also done for 101-3000MHzusingaspectrumanalyser. Thelevelofphasenoisewascalculatedat35 megahertz, 387 megahertz, 1 gigahertz, 2 gigahertz, and 2.9 gigahertz at 1, 10, 100, and 1000 kilohertz. The amount of phase noise that was acquired after experimental work washigherthanthelevelobtainedaftersimulation. Forexample,attheoutputfrequency of 387 MHz, the experimental phase noise was -104.2 dBc/Hz while the simulated was -126 dBc/Hz at 100 kHz offset frequency. The reason for this is that the phase noise contribution in the simulation was only from the phase locked loop components while in the experimental, in addition to the phase noise from the PLL components, there were other sources of phase noise while carrying out the experiment. The rise in output frequency was also accompanied by an increase in phase noise. The reason for this is that the signal generator was built with the concept of a phase locked loop which implements the idea of frequency multiplication by dividing along the feedback loop with the use of a counter. This concept raised the phase noise by 20 multiplied by the logarithm of the number of counter. The maximum spur appeared at the third harmonic and was found to be -18.6 dBc, while the minimum spur appeared at the fourth harmonic and was found to be -44.5 dBc.
Description
A thesis submitted in partial fulfillment of the requirements for the award of degree of Master of Science (electronics and instrumentation) in the school of pure and applied sciences of Kenyatta University, November 2023
Keywords
high frequency signal generator, phase locked loop